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Design of a Chaotic Signal Generator with Initial Value Tuning via the Pulse-Width Control Circuit

Abstract— In this paper, chip designs of chaotic signal generator (CSG) with initial value tuning are proposed. The initial value that can uniquely decide the waveform from CSG is adjusted via the pulse-width control circuit (PWCC). With the initial value controlled technique, the CSG can be used as the modulator for encryption and decryption applications. The PWCC chip occupies area of 1.05×1.08 2 mm in 0.18μm CMOS process with power dissipation of 55.72mW from a 3.3V supply voltage, while the CSG chip occupies area of 0.959×0.77 2 mm in 0.35μm CMOS process with power dissipation of 475mW from a 3.3V supply voltage.

Index Terms— chaotic signal generator, initial value tuning, pulse-width control, encryption and decryption , CMOS process.

Chang-Hsi Wu, Hao-We Chen
Longhua University of Science and Technology, TAIWAN
Yuan-Long Wu, Cheng-Hsiung Yang
National Taiwan University of Science and Technology, TAIWAN

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Cite: Chang-Hsi Wu, Hao-We Chen, Yuan-Long Wu, Cheng-Hsiung Yang, "Design of a Chaotic Signal Generator with Initial Value Tuning via the Pulse-Width Control Circuit," Proceedings of 2017 the 7th International Workshop on Computer Science and Engineering, pp. 736-740, Beijing, 25-27 June, 2017.